TPU v6e
TPU v6e is a Google TPU based on the Matrix MXU + VPU + SparseCore architecture, first released in 2024.
Built from BenchGecko data as of April 14, 2026 · updates when the data changes
TPU v6e is a Google TPU based on the Matrix MXU + VPU + SparseCore architecture, first released in 2024.
Basic
The Google TPU v6e Trillium is an AI TPU made by Google. Peak throughput is 918 TFLOPS at FP16/BF16 and 1,836 TFLOPS at FP8. It carries 32 GB of HBM3 with 1.64 TB/s of memory bandwidth. Rated power (TDP) is 350 W. It is built on N5 at TSMC.
Deep
In the BenchGecko dataset it sits in the frontier tier: current-generation flagship silicon shipping at scale to hyperscalers. It follows the TPU v5p and is followed by the TPU v7. Disclosed buyers include Google. Specs come from manufacturer datasheets; the spec card on this page shows the dataset values and their as-of date.
Expert
That is 2.62 FP16 TFLOPS per watt. Memory bandwidth per unit of compute is 1.79 GB/s per FP16 TFLOP: a higher ratio helps memory-bound inference, while peak TFLOPS matter more for compute-bound training. Fabrication: Taiwan. Real throughput depends on the model, precision, batch size and software stack, so compare tokens per second per dollar for your own workload.
Depending on why you're here
- ·TPU v6e: 918 TFLOPS FP16/BF16 · 1,836 TFLOPS FP8
- ·Process: N5 at TSMC
- ·Tier: frontier
- ·32 GB of HBM3 per chip
- ·Cloud availability in the dataset: Google Cloud
- ·Compare it with other chips on /hardware/tpu-v6e
- ·Disclosed buyers: Google
- ·Google · fabbed at TSMC
- ·Supply tightness is tracked on /hardware
- ·TPU v6e is a chip built to run AI, made by Google
- ·It has 32 GB of fast memory so large models fit
- ·Companies buy or rent these to train and serve AI models
Frequently Asked Questions
Read the primary sources
- Trillium announcementcloud.google.com