TPU v5p
TPU v5p is a Google TPU based on the Matrix MXU + VPU architecture, first released in 2024.
Built from BenchGecko data as of April 14, 2026 · updates when the data changes
TPU v5p is a Google TPU based on the Matrix MXU + VPU architecture, first released in 2024.
Basic
The Google TPU v5p is an AI TPU made by Google, codenamed Viperfish. Peak throughput is 459 TFLOPS at FP16/BF16. It carries 95 GB of HBM2e with 2.77 TB/s of memory bandwidth. Rated power (TDP) is 450 W. It is built on N5 at TSMC.
Deep
In the BenchGecko dataset it sits in the mainstream tier: current-generation non-flagship parts or last-generation flagships still widely deployed. It is followed by the TPU v6e. Disclosed buyers include Google. Specs come from manufacturer datasheets; the spec card on this page shows the dataset values and their as-of date.
Expert
That is 1.02 FP16 TFLOPS per watt. Memory bandwidth per unit of compute is 6.03 GB/s per FP16 TFLOP: a higher ratio helps memory-bound inference, while peak TFLOPS matter more for compute-bound training. Fabrication: Taiwan. Real throughput depends on the model, precision, batch size and software stack, so compare tokens per second per dollar for your own workload.
Depending on why you're here
- ·TPU v5p: 459 TFLOPS FP16/BF16
- ·Process: N5 at TSMC
- ·Tier: mainstream
- ·95 GB of HBM2e per chip
- ·Cloud availability in the dataset: Google Cloud
- ·Compare it with other chips on /hardware/tpu-v5p
- ·Disclosed buyers: Google
- ·Google · fabbed at TSMC
- ·Supply tightness is tracked on /hardware
- ·TPU v5p is a chip built to run AI, made by Google
- ·It has 95 GB of fast memory so large models fit
- ·Companies buy or rent these to train and serve AI models
Frequently Asked Questions
Read the primary sources
- TPU v5p product pagecloud.google.com